Past Event

Talk on “Electronics Packaging and Interconnection is there a limit to miniaturisation?”
Venue: Wisma IEM, 01- Auditorium Tan Sri Prof. Chin Fung Kee, 3rd Floor
Date & Time: 28 Aug 2019 (5:30 PM - 7:30 PM)
CPD: 2
Closing Date Before: 25-Aug-2019 (Subject to change based on availability of seat)
Organised By Special Interest Group - Consulting Engineering

SYNOPSIS

The last fifty years have seen very dramatic changes in the electronics manufacturing industry, which has had a major impact on society. A recent Reuters study shows that the global automotive electronics market will generate revenue of US$515.02 billion by 2027 and expanding at CAGR of 6.98% in the 2019-2027 forecast periods. This rapid evolution of the electronics manufacturing industry is started with the invention of the transistor and printed circuit board (PCB) in the late 1940's, through the development of the integrated circuit in the late 1950's, to the introduction of very high density area array interconnect technologies in the 1990's. Although cost and reliability are very important drivers in this globally competitive industry, the demand for product miniaturisation to meet customer requirements continues to be the key manufacturing challenge. A major trend in the design of hand-held and pocket electronic consumer products is to minimise chip packaging size to meet product requirements in terms of weight and size. At the same time the number of connections (device input-output) to a PCB is increasing to match existing and new digital/communication applications. This pressure for further miniaturisation presents new manufacturing challenges to the industry, as well as the impetus for researching novel packaging and interconnection materials/processes for meeting the emerging product requirements. The question facing the global industry is – "What is the limit to miniaturisation?" Using case studies of his own research at the University of Salford, University of Greenwich and now University of Wolver Hampton, Professor Ekere will highlight the Microsystems assembly technologies that are currently being developed to meet 21st Century product requirements, the interconnection and assembly trends, and the industrial and international collaboration that is helping to keep the UK at the forefront of the research on the miniaturisation of electronics interconnection and packaging.


BIODATA OF SPEAKER

Professor Ndy Ekere is a Professor of Manufacturing Engineering and heads the Electronics Manufacture Engineering Research Group (EMERG).  He was appointed Lecturer in the Department of Production Engineering at Nottingham Trent University in 1988, and then joined the University of Salford a year later as a lecturer in Manufacturing Engineering, where he founded the Electronics Manufacturing Engineering Research Group (EMERG) in 1992.

He served as the Dean of Engineering at the University of Greenwich (2002 – 2012; Dean of School of Technology at University of Wolverhampton (2013 – 2013); and founding Dean of Faculty of Science and engineering at University of Wolverhampton (2013 – 2016); before returning to a Professorial role in August 2016.

The focus of the research work carried out by the EMERG is to identify, explore and develop suitable assembly and packaging technologies both to meet the challenges of miniaturisation facing the electronics industry and to support virtual development of new and low-cost electronic products. As the trend towards minimising chip packaging size and increasing chip I/O count continues, one of the key challenges facing industry is that of developing low cost assembly solutions based on using conventional equipment. The group worked closely with industrial partners to develop a low cost, high volume flip-chip assembly route based on the assembly of solder-bumped chips on organic substrates, and the use of lead-free materials for flip-chip applications, flux less soldering for MEMS, and new materials for MEMS interconnect (including soldering of Si-wafers to glass/Cu). As new materials emerge, and the industry incorporate many different assembly materials into the assembly process, it is also critical to be able to describe the interactions between materials and process parameters, and the accurate characterisation and modelling is an important pre-requisite to achieving high yield and reliability.


Additional Information
Posted on
 
 
Talk on “Electronics Packaging and Interconnection is there a limit to miniaturisation?”
Flyer

09-Aug-2019
Download
Post Comment
 
Member Type Normal Rate
(RM)
Online Rate
(RM)
DISTINGUISHED HONORARY FELLOW 18.87 14.15
HONORARY FELLOW 18.87 14.15
FELLOW 18.87 14.15
DISTINGUISHED MEMBER 18.87 14.15
SENIOR MEMBER 18.87 14.15
MEMBER 18.87 14.15
HONORARY MEMBER 18.87 14.15
SENIOR GRADUATE 18.87 14.15
GRADUATE 18.87 14.15
INCORPORATED MEMBER 18.87 14.15
AFFILIATE 18.87 14.15
ASSOCIATE MEMBER 18.87 14.15
Non IEM Member 47.17 47.17

For IEM members, please CLICK HERE to login for member rate
Rate stated does not include 8% SST
Non IEM Member will be charged an additional RM 20.00 Admin Fees inclusive 8% SST.




Advertisement


Advertisement

Advertisement

Advertisement
Survey Form


NEWSLETTER

Sign up for our newsletter to receive more information
Name:

Email Address:

Follow Us